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AP54RHC804
Radiation-Hardened 8-Channel Level Translator with Cold Sparing
AP54RHC804
Description
Features & Benefits
Application
The AP54RHC804 is a radiation-hardened by design 8-channel level translator with 3-state outputs. It delivers high resiliency to single-event effects (SEE) and to a total ionizing dose (TID) to 30 krad (Si). This device is a member of the Apogee Semiconductor AP54RHC logic family. It operates across a 1.4 V to 5.5 V range on both of its supply voltage inputs, VCCA and VCCY.Â
Zero-power penaltyâ„¢ cold sparing is supported. A proprietary output stage and robust power-on reset (POR) circuit allow the AP54RHC804 to be cold-spared in any redundant configuration with no static power loss. The redundant output stage also features a high drive capability with low static power loss.Â
- SEL immune to LET of 75 MeV-cm2/mg
- 1.4 V to 5.5 V operation
- Inputs tolerant up to 5.5 V at any VCCA
- Provides logic-level translation to VCCY
- Cold sparing Inputs and Outputs
- TID RLAT 30 krad (Si) at 5.5 V
- Operating temperature range -55 °C to +125 °C
- Meets NASA’s ASTM E595 outgassing specification
- Moisture sensitivity level 1 (unlimited)
- Voltage level translation
- LVCMOS FPGA I/O level translation
- Telemetry data interfacing
- Multi-voltage system level interfacing
- Sensor integration
Technical Documentation
Top documentation for this product
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| Datasheets | AP54RHC804 Radiation-Hardened Dual Quad-SR Latch with Cold Sparing and Schmitt Trigger Inputs | 04/30/2026 | ||
| Product Flyer | AP54RHC804 Overview | 04/30/2026 | ||
| Reports | AP54RHC804 Material Content Report | 08/15/2024 | ||
| Application Note | Evaluation Grade (E-Grade) Definition | 03/04/2025 | ||
| Product Brochure | Apogee Semiconductor Product Catalog 2026 | 04/13/2026 | ||
| White Paper | The Logic of Cold Sparing Enabling Resilient Systems with Advanced Components | 01/03/2024 | ||
| White Paper | Limit the Impact of COTS Failures in Commercial Space with Apogee’s Relbridge (Co-authored by JPL) | 08/16/2024 |
| AP54RHC804 Radiation-Hardened Dual Quad-SR Latch with Cold Sparing and Schmitt Trigger Inputs | Datasheets | 04/30/2026 | |
| AP54RHC804 Overview | Product Flyer | 04/30/2026 | |
| AP54RHC804 Material Content Report | Reports | 08/15/2024 | |
| Evaluation Grade (E-Grade) Definition | Application Note | 03/04/2025 | |
| Apogee Semiconductor Product Catalog 2026 | Product Brochure | 04/13/2026 | |
| The Logic of Cold Sparing Enabling Resilient Systems with Advanced Components | White Paper | 01/03/2024 | |
| Limit the Impact of COTS Failures in Commercial Space with Apogee’s Relbridge (Co-authored by JPL) | White Paper | 08/16/2024 |
Design and Development
Top documentation for this product
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| CAD Footprints, Symbols, & 3D Models | AP54RHC804 Schematic Symbol, Footprint, and 3D Model | CAD Model | 04/21/2026 |
| AP54RHC804 Schematic Symbol, Footprint, and 3D Model | CAD Footprints, Symbols, & 3D Models | CAD Model | 21/04/2026 |
ordering
| Part Number | Pedigree | Package | Pins | Lead Finish | MSL Rating | Burn-In | Standard Lead Time (Weeks) | Request Quote |
|---|---|---|---|---|---|---|---|---|
| AP54RHC804ENT-R | Evaluation | TSSOP-20 | 20 | NiPdAu | 1 | No | 4 |
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