TalRad™ Process Design Kit
The Transistor-Adjusted-Layout for Radiation (TalRad™) Process Design Kit (PDK) is a rad-hard process design methodology that improves the radiation performance of commercial process technologies. Now available!
Benefits of the TalRad™ PDK
- Up to 10x improvement in TID performance*
- Little to no design size penalty
- Minimal process integration effort
- Standard transistor look and feel
- The TalRad™ transistor can be over 5 times smaller than their Annular counterparts for the longer channel lengths necessary for precision matching and high gain.
- The TalRad™ techniques can be implemented in any CMOS or BCD foundry to improve the radiation tolerance of bulk or shallow-trench-isolated silicon processes.
- Implementing TalRad™ includes the development of design-rule-checker and layout-vs-schematic rule decks, PCELLs and characterizing the radiation performance and reliability of the new components.
*compared to standard PDK components
The TalRad™ PDK includes:
- Annular 1.8V and 5V Transistors
- Enclosed gate transistors that reduce the total ionizing dose (TID) induced leakage in the field oxide region of MOSFETs
- Suitable for 300krad(Si) applications
- TalRad™ 1.8V and 5V Transistors
- Modified transistors that reduce the TID induced leakage with minimal size impact compared to annular transistors
- Reduced size and capacitance and improved performance compared to annular transistors
- Designed for precision analog applications
- Lower quiescent current
- Suitable for 75krad(Si) applications
- Radiation performance can be increased for more demanding applications
- TalRad™ ESD Cells
- Class II 4kV ESD, 300krad(Si) radiation tolerance
- Roadmap devices and PDK improvements as they become available
- TID resilient 50V laterally-diffused MOSFET (LDMOS)
- 100-150 krad(Si) capable TalRad™ transistors
- 3.3V annular and TalRad™ transistors
Start your rad-hard designs with the TalRad™ PDK and reduce your time to market!
Contact us for more information.